@inproceedings{2e3765caccc04365add34a87a3a7af27,
title = "Signal and power integrity (SPI) co-analysis for high-speed communication channels",
abstract = "The modeling of multiple high-speed chip-to-chip communication links over first (IC package) and second (board) level interconnects is addressed in this paper for data rates up to 28 Gb/s with model-to-hardware correlation. The suggested methodology is based on a bottom-up hybrid approach combining semi-analytical and numerical models, which are able to simultaneously consider the signal and power integrity domains and allow the incorporation of power noise models for the time domain link simulation. The required model complexity and the design space for passive interconnects are explored by analyzing diverse via and channel configurations.",
author = "Renato Rimolo-Donadio and Xiaomin Duan and Kwark, \{Young H.\} and Xiaoxiong Gu and Baks, \{Christian W.\} and Sebastian M{\"u}ller and Winkel, \{Thomas Michael\} and Thomas Strach and Lei Shan and Hubert Harrer and Christian Schuster",
year = "2013",
language = "Ingl{\'e}s",
isbn = "9781627484725",
series = "DesignCon 2013: Where Chipheads Connect",
pages = "807--831",
booktitle = "DesignCon 2013",
note = "DesignCon 2013: Where Chipheads Connect ; Conference date: 28-01-2013 Through 31-01-2013",
}