TY - GEN
T1 - RISC-V based sound classifier intended for acoustic surveillance in protected natural environments
AU - Salazar-García, Carlos
AU - Castro-González, Reinaldo
AU - Chacón-Rodríguez, Alfonso
N1 - Publisher Copyright:
© 2017 IEEE.
PY - 2017/6/13
Y1 - 2017/6/13
N2 - This paper presents results on FPGA of a RISC-V based Application Specific Processor (ASP), used as the main classification unit for acoustic pattern recognition of firearms and chainsaws in environmentally protected areas. The classifier is based on the Hidden Markov Models (HMM) technique, giving a probabilistic estimation of the current state of an acoustic environment, thereby identifying particular sounds such as gunshots or the hum from a chainsaw engine. The ASP was modeled in Verilog, and uses Berkeley's RISC-V's open Instruction Set Architecture (ISA). The code is written in C and ported to the ASP using RISC-V's toolchain. Verified results on a commercial FPGA, and preliminary synthesis results in a commercial CMOS 130nm process, point at the feasibility of a low power ASIC implementation, integrated into a wireless network of similar nodes.
AB - This paper presents results on FPGA of a RISC-V based Application Specific Processor (ASP), used as the main classification unit for acoustic pattern recognition of firearms and chainsaws in environmentally protected areas. The classifier is based on the Hidden Markov Models (HMM) technique, giving a probabilistic estimation of the current state of an acoustic environment, thereby identifying particular sounds such as gunshots or the hum from a chainsaw engine. The ASP was modeled in Verilog, and uses Berkeley's RISC-V's open Instruction Set Architecture (ISA). The code is written in C and ported to the ASP using RISC-V's toolchain. Verified results on a commercial FPGA, and preliminary synthesis results in a commercial CMOS 130nm process, point at the feasibility of a low power ASIC implementation, integrated into a wireless network of similar nodes.
KW - Acoustic signals recognition
KW - ASIC
KW - ASP
KW - environmental protection
KW - FPGA
KW - HMM
KW - low-power CMOS
KW - RISC-V
UR - https://www.scopus.com/pages/publications/85022231576
U2 - 10.1109/LASCAS.2017.7948070
DO - 10.1109/LASCAS.2017.7948070
M3 - Contribución a la conferencia
AN - SCOPUS:85022231576
T3 - LASCAS 2017 - 8th IEEE Latin American Symposium on Circuits and Systems, R9 IEEE CASS Flagship Conference: Proceedings
BT - LASCAS 2017 - 8th IEEE Latin American Symposium on Circuits and Systems, R9 IEEE CASS Flagship Conference
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 8th IEEE Latin American Symposium on Circuits and Systems, LASCAS 2017
Y2 - 20 February 2017 through 23 February 2017
ER -