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Integration of Double Barrier Memristor Die with Neuron ASIC for Neuromorphic Hardware Learning

  • Rajeev Ranjan
  • , Mirko Hansen
  • , Pablo Mendoza Ponce
  • , Lait Abu Saleh
  • , Dietmar Schroeder
  • , Martin Ziegler
  • , Hermann Kohlstedt
  • , Wolfgang H. Krautschneider

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

This paper details the design of an integrate fire (I F) neuron ASIC and its integration with a double barrier memristor device. The memristor has a non-volatile analog memory characteristic which changes with time and voltage. The neuron ASIC is designed to interact with the memristor by integrating its current and firing when a certain threshold is reached. The resulting spikes increase the memristor's conductance and consequently the firing rate of neuron increases. Together, the ASIC and the memristor mimics neuromorphic learning on hardware. The ASIC has been fabricated in AMS 350nm process.

Original languageEnglish
Title of host publication2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781538648810
DOIs
StatePublished - 26 Apr 2018
Externally publishedYes
Event2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 - Florence, Italy
Duration: 27 May 201830 May 2018

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
Volume2018-May
ISSN (Print)0271-4310

Conference

Conference2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018
Country/TerritoryItaly
CityFlorence
Period27/05/1830/05/18

Keywords

  • ASIC
  • circuit
  • CMOS
  • DBMD
  • Memristor
  • Neuromorphic
  • Neuron

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