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Integrated Circuit with Memristor Emulator Array and Neuron Circuits for Biologically Inspired Neuromorphic Pattern Recognition

  • Rajeev Ranjan
  • , Pablo Mendoza Ponce
  • , Wolf Lukas Hellweg
  • , Alexandros Kyrmanidis
  • , Lait Abu Saleh
  • , Dietmar Schroeder
  • , Wolfgang H. Krautschneider

Research output: Contribution to journalArticlepeer-review

14 Scopus citations

Abstract

This paper details an application-specific integrated circuit (ASIC) with an array of switched-resistor-based memristors (resistor with memory) and integrate & fire (I & F) neuron circuits for the development of memristor-based pattern recognition. Since real memristors are not commercially available, a compact memristor emulator is needed for device study. The designed ASIC has five memristor emulators with one having a conductance range from 4.88ns to 4.99μs (200kN) to 204.8MN)) and other four having conductance ranging from 195ns to 190μs (5.2kN) to 5.12MN)). Signal processing has been planned to be off-chip to get the freedom of programmability of a wide range of memristive behavior. This paper introduces the memristor emulator and the realization of synapse functionalities used in neuromorphic circuits such as long term potentiation (LTP), Long Term depression (LTD) and synaptic plasticity. The ASIC has two I & F neuron circuits which are intended to be used in conjunction with memristors in a multiple chip network for pattern recognition. This paper explains the memristor emulator, I & F neuron circuit and a respective neuromorphic system for pattern recognition simulated in LTspice. The ASIC has been fabricated in AMS 350nm process.

Original languageEnglish
Article number1750183
JournalJournal of Circuits, Systems and Computers
Volume26
Issue number11
DOIs
StatePublished - 1 Nov 2017

Keywords

  • ASIC
  • CMOS
  • LTD
  • LTP
  • emulator
  • memristor
  • neuron
  • pattern recognition
  • synaptic plasticity

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