Abstract
In this third paper of the series physics-based models are used to develop insight into practical aspects of the electrical performance of via interconnects in the frequency range up to 20 GHz. It will be shown that with careful design of the via environment, the current return path can be controlled, which makes it possible to describe vias in terms of transmission line parameters in certain frequency ranges. This implies that via impedance can be controlled to match a specific target in order to minimize reflections. Furthermore, the via stub effect and alternatives to mitigate it by shifting unwanted resonances beyond the range of interest are addressed. Finally, both via impedance matching and stub length reduction methods were applied to a generic link configuration in order to assess the impact on signal integrity.
| Original language | English |
|---|---|
| Pages | 76-84 |
| Number of pages | 9 |
| Volume | 3 |
| No | 1 |
| Specialist publication | IEEE Electromagnetic Compatibility Magazine |
| DOIs | |
| State | Published - 1 Mar 2014 |
Keywords
- Parallel-plates
- Physics-based via model
- Printed circuit board
- Signal and power integrity
- Stub effect
- Via impedance
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