An Exploration of Accuracy Configurable Matrix Multiply-Addition Architectures using HLS

Low-power consumption and constraint resources limit the implementation of deep learning inference solutions at the edge. Besides, the approximate computing paradigm reports promising techniques for the design of DNN accelerators to deal with inherent limitations of the edge. This paper summarises the automatic generation of generic matrix multiplication-addition (GEMMA) processing elements (PEs), leveraging High-Level Synthesis and emphasising in adaptable matrix size, data bit-width, and data type for accuracy configuration, and their impact on the overall design resource consumption. For generated PEs efficiency evaluation, this work presents a novel Figure of merit that considers computing performance and resource utilisation regarding the FPGA platform underneath. Finally, we analyse the impact of different design configurations in the numerical errors introduced due to the output bit-width preservation regarding the input, and matrix size, data bit-width and type configuration.