A Software Controlled Hardware Acceleration Architecture for Image Processing Using an Embedded Development Board

Mauricio Paz Valverde; Jeferson Gonzalez Gomez

A Software Controlled Hardware Acceleration Architecture for Image Processing Using an Embedded Development Board

Mauricio Paz Valverde
, Jeferson Gonzalez Gomez

Escuela de Ingeniería en Computadores

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

2 Scopus citations

Original language	English
Title of host publication	2016 Ieee 36th Central American And Panama Convention (concapan Xxxvi)
Number of pages	5
State	Published - 2016

Keywords

Fpga
Digital image processing
Hardware acceleration

Cite this

@inproceedings{7f162eb845c84521a3571bd4ba1cfcd9,

title = "A Software Controlled Hardware Acceleration Architecture for Image Processing Using an Embedded Development Board",

keywords = "Fpga, Digital image processing, Hardware acceleration",

author = "\{Paz Valverde\}, Mauricio and \{Gonzalez Gomez\}, Jeferson",

year = "2016",

language = "Ingl{\'e}s",

booktitle = "2016 Ieee 36th Central American And Panama Convention (concapan Xxxvi)",

}

TY - GEN

T1 - A Software Controlled Hardware Acceleration Architecture for Image Processing Using an Embedded Development Board

AU - Paz Valverde, Mauricio

AU - Gonzalez Gomez, Jeferson

PY - 2016

Y1 - 2016

KW - Fpga

KW - Digital image processing

KW - Hardware acceleration

UR - https://www.webofscience.com/api/gateway?GWVersion=2&SrcApp=tec-sibitec&SrcAuth=WosAPI&KeyUT=WOS:000405550200017&DestLinkType=FullRecord&DestApp=WOS_CPL

M3 - Contribución a la conferencia

BT - 2016 Ieee 36th Central American And Panama Convention (concapan Xxxvi)

ER -

A Software Controlled Hardware Acceleration Architecture for Image Processing Using an Embedded Development Board

Keywords

Other files and links

Cite this